摘要: |
本文回顾和梳理了当前片上雷达(Radar on Chip, RoC)的架构和射频前端、天线及信号处理等芯片化研究进展,以及基于异质异构集成、3D先进封装技术的雷达系统集成实现方案。在此基础上,从物理形态、实现工艺及技术发展等方面对片上雷达未来发展趋势进行了分析,指出基于硅基半导体工艺,片上集成多路雷达收发前端、波形产生及信号处理等雷达功能单元,实现片上系统(System on Chip, SoC);或者通过异质异构及先进封装技术,将高度集成的雷达芯片集成在一个封装内,实现封装系统(System in Package, SiP),从而满足雷达系统微型化、轻重量、低成本和低功耗的发展需求。同时,基于芯片化可扩充多通道阵列模块也有望构建大型复杂阵列雷达系统。该方案为未来小型化武器装备提供有效的探测感知手段,也为蓬勃发展的民用雷达提供可行的技术路径。 |
关键词: 片上雷达 相控阵 毫米波雷达 太赫兹雷达 异质/异构集成 3D封装 |
DOI:DOI:10.3969/j.issn.1672-2337.2022.04.001 |
分类号:TN958 |
基金项目: |
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Developments and Trends of Radar-on-Chip Technologies |
LUO Jian, DUAN Zongming
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The 38th Research Institute of China Electronics Technology Group Corporation, Hefei 230088, China
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Abstract: |
This paper reviews the recent developments of radar-on-chip (RoC) architecture, the radar chips including RF front-end, radar antenna and signal processing, and the radar system integration solutions based on heterogeneous integration and 3-D advanced packaging technology. Then the trends of RoC, involving its process, physical form and technology, are analyzed. It is concluded that the radar system-on-chip (SoC) can be realized by integrating multi-channel radar front-ends, waveform generation, signal processing, etc. in silicon semiconductor process, and the radar system-in-package (SiP) can be achieved by integrating highly-integrated radar chips into a package through heterogeneous integration and advanced packaging technology, hereby meeting the growing demands for the miniaturized, lightweight, low-cost and low-power-consumption radar systems. Meanwhile, based on the scalable multi-channel front-end chip array, the large and complex array radar systems can also be constructed. The proposed solution will not only provide a reliable detection solution for miniaturized war equipment, but also show a practical technique approach for the booming civil radars. |
Key words: radar-on-chip (RoC) phased-array mm-wave radar terahertz radar heterogeneous integration 3-D package |