| 摘要: |
| 在高中频采样或是射频直采的雷达接收系统中，随着分辨率等要求不断提高，信号带宽以及采样率不断增大，FPGA等数字信号处理器件难以直接处理速率高达数GHz的宽带信号。针对采样率与FPGA工作频率的差异，本文基于多相滤波原理，提出了一种可灵活配置并行处理架构的数字下变频方法，针对多种信号情况进行了计算机仿真，并对FPGA实现的滤波器设计、数据处理位宽、资源消耗以及基带信号质量进行了分析与验证。结果表明，本文方法能够适应高速宽带信号的并行数字下变频，有效降低FPGA工作频率，具备较高的工程实用性以及通用性。 |
| 关键词: 宽带 数字下变频 多相滤波 并行处理 FPGA |
| DOI： |
| 分类号:TN957.5 |
| 基金项目:国家自然科学基金 (No.62273365)；深圳市科技计划资助 (No.SGDX20230116092503007) |
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| A Multi-channel Parallel Method of Wideband Signal Digital Down Conversion based on FPGA |
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| Abstract: |
| In the radar receiving system with high intermediate frequency sampling or RF direct sampling, with the increasing requirements of resolution, signal bandwidth and sampling rate, it is difficult for digital signal processing devices such as FPGA to directly handle wideband signals with a rate of up to GHz. Aiming at the rate difference between sampling rate and FPGA working frequency, this paper proposes a digital down conversion method based on the principle of polyphase filter which can flexibly configure parallel processing structure. The computer simulations are carried out for various signal conditions. Meanwhile, the filter design, data processing bit width, resource consumption and baseband signal quality in FPGA implementation are analyzed and verified. The results show that the proposed method can well adapt to the parallel digital down conversion of high-speed wideband signals and effectively reduce the FPGA working frequency, which has higher engineering practicability and versatility. |
| Key words: wideband digital down conversion polyphase filter parallel FPGA |